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      "Towards monolithic quantum computing processors in production FDSOI CMOS technology" by Dr. Sorin P. Voinigescu, University of Toronto in Santa Clara


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      December 12, 2019

      Thursday   6:00 PM

      3165 Kifer Road Santa
      Santa Clara, California

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      "Towards monolithic quantum computing processors in production FDSOI CMOS technology" by Dr. Sorin P. Voinigescu, University of Toronto

      "Towards monolithic quantum computing processors in production FDSOI CMOS technology" Dr. Sorin P. Voinigescu, University of Toronto Event Organized By: Circuits and Systems Society (CASS) of the IEEE Santa Clara Valley Section Co-sponsors: Microwave Theory and Techniques (MTT) Solid-State Circuits Society(SSCS) Communication Society (ComSoc) Signal Processing Society(SPS) PROGRAM: 6:00 - 6:30 PM Networking & Refreshments6:30 - 7:45 PM Talk7:45 - 8:00 PM Q&A/Adjourn Lecture will be broadcast live on Zoom and recorded. Please register to receive Zoom conference details one day before the event.  Abstract: This presentation will discuss the fundamental concepts and the feasibility of high-temperature (2-4 K) Si and SiGe electron/hole-spin qubits and qubit integrated circuits (ICs) in commercial 22nm FDSOI CMOS technology,. The beneficial aspects of the SiGe channel hole-spin qubit will be emphasized in comparison with its silicon-only electron-spin counterpart. It is also shown that, at 2 K, MOSFETs and cascodes can be operated as quantum dots in the subthreshold region, while behaving as classical MOSFETs and cascodes in the saturation region, suitable for qubits and mm-wave mixed-signal processing circuits, respectively. Challenges in the design and testing of quantum processor units monolithically integrated with readout and mm-wave spin control electronics in commercial 22nm FDSOI CMOS technology, will also be covered. Finally, I will present measurements for full technology characterization at cryogenic temperatures up to 67 GHz. Bio: Sorin P. Voinigescu is a Professor in the Electrical and Computer Engineering Department at the University of Toronto where he holds the Stanley Ho Chair in Microelectronics and is the Director of the VLSI Research Group. He is an IEEE Fellow and an expert on millimeter-wave and 100+Gb/s integrated circuits and atomic-scale semiconductor device technologies. He obtained his PhD degree in Electrical and Computer Engineering from the University of Toronto in 1994 and his M.Sc Degree in Electronics and Telecommunications from the Politechnical Institute of Bucharest in 1984. Venue: QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara, CA 95051 Zoom Broadcast: Lecture will be broadcast live on Zoom and recorded. Please register to receive Zoom conference details one day before the event.  Admission Fee: All admissions free. Suggested donations to cover food and water:  Non-IEEE:  $5, Students (non-IEEE): $3, IEEE Members (not members of CASS or SSCS): $3 Online registration is recommended to guarantee seating.

      Categories: University & Alumni | Science | Technology

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